Due to load pulling, power supply pushing, and radio frequency (RF) re-modulation effects in a narrow bandwidth phase locked loop (PLL), such as a fractional-N PLL, it is desirable to use a wide bandwidth PLL in some applications. In addition, when using the PLL for direct digital modulation as described in commonly owned and assigned U.S. Pat. No. 6,834,084, entitled DIRECT DIGITAL POLAR MODULATOR, issued Dec. 21, 2004, which is incorporated herein by reference in its entirety, narrow band PLLs may require pre-distortion and calibration. A typical wide bandwidth PLL is an Offset PLL (OPLL). However, OPLLs require an I/Q modulator in order to generate either a reference frequency provided to a phase detector of the OPLL or a feedback signal provided to the phase detector. The I/Q modulator requires careful design and an analog interface. However, in many applications, it is desirable to have a digital interface. Accordingly, there remains a need for a less complex wide bandwidth PLL having a digital interface.
In addition, in any PLL system, spurs may occur at a frequency FSPUR=m*F1+n*F2, where F1 and F2 are fundamental signal frequencies, such as a reference frequency of the PLL, the frequency of a voltage controlled oscillator (VCO) within the PLL, or other external interfering sources. Thus, there further remains a need for a PLL and corresponding method capable of avoiding known spurs.